MV-S, Rev. Caution: Indicates potential damage to hardware or software, or loss of data. Warning: Indicates a risk of personal injury. Document Status Advance Information Preliminary Information Final Information This document contains design specifications for initial product development. Specifications may change without notice.
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MV-S, Rev. Caution: Indicates potential damage to hardware or software, or loss of data. Warning: Indicates a risk of personal injury. Document Status Advance Information Preliminary Information Final Information This document contains design specifications for initial product development.
Specifications may change without notice. Contact Marvell Field Application Engineers for more information. This document contains preliminary data, and a revision of this document will be published at a later date. This document contains specifications on a product that is in final release. Technical Publications: 1. Marvell retains the right to make changes to this document at any time, without notice. Marvell makes no warranty of any kind, expressed or implied, with regard to any information contained in this document, including, but not limited to, the implied warranties of merchantability or fitness for any particular purpose.
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Marvell International Ltd. All rights reserved. All other trademarks are the property of their respective owners. MV-S Rev. It is manufactured using standard digital CMOS process and contains all the active circuitry required to implement the physical layer functions to transmit and receive data on standard CAT 5 unshielded twisted pair.
Using VCT, the Alaska 88E device detects and reports potential cabling issues such as pair swaps, pair polarity and excessive pair skew.
The device will also detect cable opens, shorts or any impedance mismatch in the cable and report accurately within one meter the distance to the fault. The 88E device incorporates an optional 1. The 88E device uses advanced mixed-signal processing to perform equalization, echo and crosstalk cancellation, data recovery, and error correction at a gigabit per second data rate.
The device achieves robust performance in noisy environments with very low power dissipation. See Table 3 for TBI pin definitions. The MAC interface pins are 3. MII Transmit Clock. The 2. TXD are ignored in these modes, but should be driven either high or low.
These pins must not float. Inputs TXD should be tied low if not used e. Refer to Register 9 for jitter test modes. CRS asserts when the receive medium is non-idle. In halfduplex mode, CRS is also asserted during transmission.
CRS assertion during halfduplex transmit can be disabled by programming register SQE can be disabled by clearing register TBI Transmit Data.
TXD presents the data byte to be transmitted onto the cable. TBI Receive Data code group . Symbols received on the cable are decoded and presented on RXD. TBI Mode Loopback. If this feature is not used, the COL pin should be driven low on the board. This pin should not be left floating in TBI mode. In this mode, TXD are ignored. In this mode, RXD are ignored.
Output amplitude can be adjusted via register Positive and Negative. A continuous clock stream is not expected.
The maximum frequency supported is 8. MDIO is the management data. This pin requires a pull-up resistor in a range from 1. Data is input on the rising edge of SCL, and output on the falling edge.
TWSI serial data line. This pin is open-drain and may be wire-ORed with any number of open-drain devices. In direct drive LED mode, this pin indicates 10 Mbps link up or down. In direct drive LED mode, this pin indicates Mbps link up or down. TDI contains an internal kohm pull-up resistor. Boundary scan test mode select input. TMS contains an internal kohm pull-up resistor.
Boundary scan test clock input. TCK contains an internal kohm pull-up resistor. Boundary scan test reset input. Active low. TRSTn contains an internal kohm pullup resistor as per the Boundary scan test data output. Each LED pin is hardwired to a constant value.
They should not be left floating. Internally divided to 25 MHz. PLL clocks are not recommended. Reference Clock. When the XTAL2 pin is not connected, it should be left floating.
There is no option for a MHz crystal. RESETn must be pulled high for normal operation. COMA disables all active circuitry to draw absolute minimum power. The COMA power mode cannot be enabled as long as hardware reset is enabled. These pins should be left floating but brought out for probing. External 5. This pin must be connected to the ground. No connect. Package Mechanical Dimensions 2.
Order Information 3. Contact Marvell? FAEs or sales representatives for complete ordering information. Location of markings is approximate.